TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-351
ST.BA[15], off4, D[a] (SSRO)
Status Flags
Examples
st.b [a0+]2, d0
st.b [a3]+24, d2
See Also
ST.A, ST.D, ST.DA, ST.H, ST.Q, ST.W
M(A[15] + zero_ext(off4), byte) = D[a][7:0];
C Not set by this instruction.
V Not set by this instruction.
SV Not set by this instruction.
AV Not set by this instruction.
SAV Not set by this instruction.
st.b [a0], d0
st.b [a15]+14, d2