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Infineon TriCore TC1.6P - Page 473

Infineon TriCore TC1.6P
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TriCore
®
TC1.6P & TC1.6E
32-bit Unified Processor Core
Instruction Set
V1.0 2013-07
User Manual (Volume 2) 3-426
SH.NAND.T - Accumulating Shift-NAND
SH.NOR.T - Accumulating Shift-NOR
SH.OR.T - Accumulating Shift-OR
SH.ORN.T - Accumulating Shift-OR-Not
SH.XNOR.T - Accumulating Shift-XNOR
SH.XOR.T - Accumulating Shift-XOR
SHA - Arithmetic Shift
SHA.H - Arithmetic Shift Packed Half-words
SHAS - Arithmetic Shift with Saturation
SUB - Subtract
SUB.B - Subtract Packed Byte
SUB.H - Subtract Packed Half-word
SUBC - Subtract With Carry
SUBS - Subtract Signed with Saturation
SUBS.U - Subtract Unsigned with Saturation
SUBS.H - Subtract Packed Half-word with Saturation
SUBS.HU - Subtract Packed Half-word Unsigned with Saturation
SUBX - Subtract Extended
UNPACK - Unpack Floating Point
XNOR - Bitwise XNOR
XNOR.T - Bit Logical XNOR
XOR - Bitwise XOR
XOR.EQ - Equal Accumulating
XOR.GE - Greater Than or Equal Accumulating
XOR.GE.U - Greater Than or Equal Accumulating Unsigned
XOR.LT - Less Than Accumulating
XOR.LT.U - Less Than Accumulating Unsigned
XOR.NE - Not Equal Accumulating
XOR.T - Bit Logical XOR
ADD.F - Add Float
CMP.F - Compare Float
DIV.F
- Divide Float
FTOI - Float to Integer
FTOIZ - Float to Integer, Round towards Zero
FTOQ31 - Float to Fraction
FTOQ31Z - Float to Fraction, Round towards Zero
FTOU - Float to Unsigned
FTOUZ - Float to Unsigned, Round towards Zero
ITOF - Integer to Float
MADD.F - Multiply Add Float
MSUB.F - Multiply Subtract Float
MUL.F - Multiply Float
Q31TOF - Fraction to Floating-point
QSEED.F - Inverse Square Root Seed
SUB.F - Subtract Float
UPDFL - Update Flags
UTOF - Unsigned to Floating-point

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