ST STM32F207 series User Manual

RM0033 Rev 9 1357/1381
RM0033 Revision history
1375
15-Apr-2011
3
(continued)
CRYPTO:
Updated Section 19.1: CRYP introduction.
Modified Figure 195: Block diagram.
Updated Section 19.3.1: DES/TDES cryptographic core,
Section 19.3.2: AES cryptographic core, and Table 74: Data types.
HASH:
In Section 21.4.5: HASH interrupt enable register (HASH_IMR),
renamed HASH_IMR into interrupt enable register, and bits DCIM
and DINIM into DCIE and DINIE, respectively.
Updated INIT bit description in Section 21.4.1: HASH control register
(HASH_CR).
RTC:
Added RTC_50Hz clock input for synchronous prescaler in
Figure 215: RTC block diagram.
Renamed digital calibration into coarse calibration.
Updated ALARMOUTTYPE definition.
Digital calibration renamed coarse calibration.
RNG:
Renamed IM bit of RNG_CR register into IE.
I2C:
Updated BERR bit description in Section 23.6.6: I
2
C Status register 1
(I2C_SR1).
Updated Note in Section 23.6.8: I
2
C Clock control register
(I2C_CCR).
Updated requests in master receiver mode in Section 23.3.7: DMA
requests.
Added note 3 below Figure 218: Transfer sequence diagram for
slave transmitter on page 603. Added note below Figure 219:
Transfer sequence diagram for slave receiver on page 604. Modified
Section : Closing slave communication. Modified STOPF, ADDR, bit
description in Section 23.6.6: I
2
C Status register 1 (I2C_SR1).
Modified Section 23.6.7: I
2
C Status register 2 (I2C_SR2).
USART:
Updated Figure 231: Mute mode using address mark detection for
Address =1.
Renamed ONEBITE to ONEBIT in USART_CR3 register.
Table 224. Document revision history (continued)
Date Version Changes

ST STM32F207 series Specifications

General

Brand	ST
Model	STM32F207 series
Category	Microcontrollers
Language	English