RM0033 Rev 9 1363/1381
RM0033 Revision history
1375
05-Nov-2012 5
PWR:
Updated V
DDA
and V
REF+
decoupling capacitor in Figure 3: Power
supply overview. Updated case of no external battery in
Section 4.1.2: Battery backup domain.
RCC:
Updated System clock frequency in Figure 9: Clock tree and
Figure 11: Frequency measurement with TIM5 in Input capture
mode. Updated HSITRIM[4:0] in Section 5.3.1: RCC clock control
register (RCC_CR).
GPIOs:
Updated debug pins input pull-up/pull-down status after reset in
Section 6.3.1: General-purpose I/O (GPIO).
Interrupts and events:
Updated number of maskable interrupt in Section 8.1.1: NVIC
features.
DMA:
Updated direct mode description in Section 9.2: DMA main features.
Updated direct mode description in Section : Memory-to-peripheral
mode, and /Section : Memory-to-memory mode.
ADC:
Changed ADCCLK frequency to 30 MHz in Section 10.5: Channel-
wise programmable sampling time. Updated Section : Reading the
temperature.
Added recovery from ADC sequence in Section 10.8.1: Using the
DMA and Section 10.8.2: Managing a sequence of conversions
without using the DMA.
TIM1 to TIM8:
Updated 16-bit prescaler range in Section 13.2: TIM1 and TIM8 main
features.
Updated update event generation in Section : Upcounting mode and
Section : Downcounting mode in Section 13.3.2: Counter modes,
and in Section 13.3.3: Repetition counter.
Updated OC1 block diagram in Figure 93: Output stage of
capture/compare channel (channel 1 to 3).
Updated Section 13.3.6: Input capture mode.
Updated bits that control the dead-time generation in
Section 13.3.11: Complementary outputs and dead-time insertion.
Updated ways to generate a break in Section 13.3.12: Using the
break function.
OCxREF changed to ETR in the example given in Section 13.3.13:
Clearing the OCxREF signal on an external event and OCREF_CLR
to ETRF in Figure 103: Clearing TIMx OCxREF.
Table 224. Document revision history (continued)
Date Version Changes
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