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ARM CoreLink GIC-600AE

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Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Revisions
Change Location
Corrected the values of the ProductID, Variant, and
Revision fields
5.2.3 GICD_IIDR, Distributor Implementer Identification
Register on page 103
5.4.1 GICR_IIDR, Redistributor Implementation
Identification Register on page 122
5.6.1 GITS_IIDR, ITS Implementer Identification Register on
page 138
Corrected the values of the Version field 5.5.5 GICR_CFGID1, Configuration ID1 Register on page 135
Writing 0b10 also clears the CE field 5.10.3 FMU_ERR<n>STATUS, Error Record Primary Status
register on page 182
Added the following Safety Mechanisms:
GICD FMU ClkGate override
PPI FMU ClkGate override
ITS FMU ClkGate override
6.2.5 Safety Mechanism IDs on page 199
Added restriction for ClkGate override Safety
Mechanisms
6.2.5.2 Injecting an error in a Safety Mechanism on page 202
Table C-4: Differences between issue 0001-02 and issue 0002-03
Change Location
Removed reference to Reliability Accessibility Serviceability
(RAS)
Throughout 5.10 FMU register summary on page 179 and
including its subsections, and 6. Functional Safety on page
193
Updated the Revision field value
5.2.3 GICD_IIDR, Distributor Implementer
Identification Register on page 103
5.4.1 GICR_IIDR, Redistributor Implementation
Identification Register on page 122
5.6.1 GITS_IIDR, ITS Implementer Identification
Register on page 138
Added registers
5.3.1 GICM_TYPER, Message-based Type Register on
page 119
5.3.2 GICM_IIDR, Message-based Distributor
Implementer Identification Register on page 120
Updated the Version field value 5.5.5 GICR_CFGID1, Configuration ID1 Register on page
135
Corrected the EVENT_ID description Table 5-40: GITS_OPR bit descriptions on page 144
Corrected the FMU_ERR<n>STATUS reset value 5.10 FMU register summary on page 179
Updated the FI and UI bit descriptions 5.10.2 FMU_ERR<n>CTLR, Error Record Control Register
on page 180
Updated the Usage constraints and Attributes. Updated the
BLKID description.
5.10.3 FMU_ERR<n>STATUS, Error Record Primary Status
register on page 182
Updated the enabled description 5.10.6 FMU_PINGCTLR, Ping Control Register on page
185
Corrected the ping_ack_received description 5.10.7 FMU_PINGNOW, Ping Now register on page 186
Added the remote_block_inject_error and gicd_inject_error
bits
5.10.7 FMU_PINGNOW, Ping Now register on page 186
Updated the Usage constraints 5.10.10 FMU_PINGMASK, Ping Mask register on page
190
Copyright © 2018–2020, 2022 Arm Limited (or its affiliates). All rights reserved.
Non-Confidential
Page 266 of 268

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