ARM CoreLink GIC-600AE

Arm
®
CoreLink™ GIC-600AE Generic Interrupt Controller
Technical Reference Manual
Document ID: 101206_0003_04_en
Issue: 04
Operation
GICT_ERR<n>STATUS.IERR
(Syndrome)
GICT_ERR<n>STATUS
.SERR
GICT_ERR<n>MISC0.
Data description
(other bits RES0)
Always packed from
0 (lowest = 0)
Recovery, prevention
0x2A, SYN_ITS_REG_INV_OOR
An attempt was made to invalidate
an OOR interrupt. Only valid when
GICR LPI injection registers are
supported.
0xE Core, bits[24:16]
Data, bits[15:0]
Software must not attempt to clear nonexistent
LPIs
0x2B, SYN_ITS_REG_SET_ENB
An attempt was made to set an
interrupt when LPIs are not enabled.
Only valid when GICR LPI injection
registers are supported.
0xF Core, bits[24:16]
Data, bits[15:0]
Software must follow architectural steps to enable
LPIs on the specified core before enabling the core
to send interrupts
0x2C, SYN_ITS_REG_CLR _ENB
An attempt was made to clear an
interrupt when LPIs are not enabled.
Only valid when GICR LPI injection
registers are supported.
0xF Core, bits[24:16]
Data, bits[15:0]
Software must not try to clear LPIs on a
core that does not have LPIs enabled using
GICR_CTLR.Enable_LPIs
0x2D, SYN_ITS_REG_INV_ENB
An attempt was made to invalidate
an interrupt when LPIs are not
enabled. Only valid when GICR LPI
injection registers are supported.
0xF Core, bits[24:16]
Data, bits[15:0]
Software must not try to invalidate LPIs on a
core that does not have LPIs enabled using
GICR_CTLR.Enable_LPIs
0x40, SYN_LPI_PROP_READ_FAIL
An attempt was made to read
properties for a single interrupt,
where an error response was
received with the data.
0x12 Target, bits[29:16]
ID, bits[15:0]
Software must reprogram the LPI Property table
for the specified ID with error-free data and then
issue an INV command through the ITS. If an
overflow occurred, an INVALL command must be
issued to all cores.
0x41, SYN_PT_PROP_READ_FAIL
An attempt was made to read
properties for a block of interrupts,
where an error response was
received with the data.
0x12 Target, bits[29:16]
ID, bits[15:0]
Software must reprogram the LPI Property table
for the specified ID with error-free data and then
issue an INV command through the ITS. If an
overflow occurred, an INVALL command must be
issued to all cores.
0x42,
SYN_PT_COARSE_MAP_READ_FAIL
An attempt was made to read the
coarse map for a target, where an
error response was received with the
data.
0x12 Target, bits[29:16] No recovery is necessary because the GIC
assumes that the coarse map is full
0x43,
SYN_PT_COARSE_MAP_WRITE_FAIL
An attempt was made to write the
coarse map for a target, with an error
received with the write response.
0x12 Target, bits[29:16] The GIC attempts to continue, however this error
indicates issues with the memory system, and
operation might be unpredictable
0x44, SYN_PT_TABLE_READ_FAIL
An attempt was made to read a
block of interrupts from a Pending
table, where an error response was
received with the data.
0x12 Target, bits[29:16]
ID, bits[15:0]
Software must determine the reason for the
pending error read fail. The GIC uses the data
that is supplied, however, it is possible for the LPI
interrupt to be lost around the specified LPI.
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