RM0033 Rev 9 1369/1381
RM0033 Revision history
1375
04-Feb-2015
7
(continued)
WWDG
Updated Figure 193: Watchdog block diagram and Section 18.4:
How to program the watchdog timeout.
Updated Figure 194: Window watchdog timing diagram.
RNG
Replaced PLL48CLK by RNG_CLK in the whole section.
RTC
Changed bit 9 ALRBIE to ALRBE in Section 22.6.3: RTC control
register (RTC_CR).
Added note in Section 22.3.12: Calibration clock output.
I2C
Introduced Sm (standard mode) and Fm (fast mode) acronyms.
ETHERNET
Updated TBAP2 bit description in Section ·: TDES3: Transmit
descriptor Word3.
Changed PPS output enabling method in Section : PTP pulse-per-
second output signal.
Updated Table 140: Clock range.
Added ETH_PTPPPSCR in Table 148: Ethernet register map and
reset values.
USB OTG-FS
Figure 349: OTG full-speed block diagram, Figure 350: OTG A-B
device connection, Figure 351: USB peripheral-only connection,
Figure 352: USB host-only connection and Figure 353: SOF
connectivity made generic to all product lines.
Removed TRDT formula in Section 29.17.7: Worst case response
time and added Table 156: TRDT values.
USB OTG-HS
Updated DSPD definition in Section : OTG_HS device configuration
register (OTG_HS_DCFG)
Removed TRDT formula in Section 30.13.8: Worst case response
time and added Table 166: TRDT values
FSMC
Updated BUSTURN definition in Table 198: FSMC_BTRx bit fields.
Updated Figure 415: Synchronous multiplexed read mode - NOR,
PSRAM (CRAM).
DEBUG
Updated REV_ID[15:0) in Section : DBGMCU_IDCODE to add
revision 1, V and 2.
Table 224. Document revision history (continued)
Date Version Changes
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