Circuit Pack Descriptions
Issue 8.0 July 2002
7-37
In the transmit direction, the incoming DS3 signals can be either formatted or
unformatted (clear channel). The DS3 circuit pack accepts up to three 44.736
Mb/s bipolar 3-zero substitution (B3ZS) coded DS3 signals. These DS3 signals
are split by the input protection interface. The outputs of the input protection
interface are connected to the DS3 receiver and the Low Speed Switch (LSSW
IN) circuit pack (for protection). The DS3 receiver recovers timing from the
B3ZS-coded DS3 signals and sends the received data and recovered clock to the
DS3/STS-1 synchronizer/desynchronizer. The DS3/STS-1
synchronizer/desynchronizer converts each DS3 to an STS-1 format (51.84
Mb/s). The STS-1 path overhead and pointer bytes are also added to the STS-1
signal. The byte multiplexer/demultiplexer then scrambles and multiplexes the
three STS-1 signals into one 155.52 Mb/s signal. The high speed interface sends
the 155.52 Mb/s signal to the OC48 TRMTR circuit packs.
Receive Direction. 7In the receive direction, the high speed interface accepts the
155.52 Mb/s signal from the OC48 Receiver (OC48 RCVR) circuit pack and sends
it to the byte multiplexer/demultiplexer. The byte multiplexer/demultiplexer
recovers timing, descrambles, and demultiplexes the 155.52 Mb/s signal into
three STS-1 signals. The three STS-1 signals are then sent to the DS3/STS-1
synchronizer/desynchronizer. Each STS-1 signal goes through STS-1 pointer
processing, and the STS-1 path overhead is removed and processed. After each
DS3 signal is recovered from the STS-1 payload envelope, the DS3 P-bits may be
monitored and corrected through a provisionable violation, monitor, and removal
function with optional alarm indication signals (AIS). The DS3/STS-1
synchronizer/desynchronizer sends three B3ZS-coded DS3 signals and a 44.736
MHz clock to the DS3 driver. The DS3 driver provides three standard B3ZS-coded
DS3 signals to the output protection interface. The output protection interface
selects the signals from the DS3 driver or the Low Speed Switch (LSSW OUT)
circuit pack (for protection) and outputs then to the DSX-3 panel (or equivalent).
The four provisionable modes are:
■ Violation monitoring and removal (VMR): In this mode, DS3 P-bit (parity)
violation monitoring and removal are performed on the outgoing (toward
the cross-connect panel) DS3 signals.
■ Violation monitoring (VM) without removal: In this mode, DS3 P-bit (parity)
violation monitoring is performed on the outgoing DS3 signals, but no
corrections are made.
■ Clear channel (CC) with AIS insertion: In this mode, outgoing DS3 signals
are passed through without any violation monitoring. If an incoming loss of
signal is detected, a DS3 AIS signal is inserted.
■ CC without AIS insertion: In this mode, outgoing DS3 signals are passed
through without any violation monitoring. If an incoming loss of signal is
detected, no DS3 AIS signal is inserted.