Circuit Pack Descriptions
Issue 8.0 July 2002
7-103
Control Circuitry 7
The board controller circuit controls all the circuit pack activities. The board
controller circuit interfaces with the Line Controller (LNCTL) circuit pack via the
board controller local area network (BCLAN).
The OC48 TRMTR A/D circuit pack reports the status of the circuit pack and the
outgoing OC-48 signal, as well as inventory information (CLEI code, serial
number, etc.). The status information is used by the LNCTL circuit pack for fault
detection and isolation. Conversely, the OC48 TRMTR A/D circuit pack responds
to control signals from the LNCTL circuit pack.
The OC48 TRMTR A/D circuit pack also accepts the SONET transport overhead
bytes from the OHCTL (TERM) circuit pack via the transport overhead channel
interface.
Timing Circuitry 7
The OC48 TRMTR A/D circuit pack accepts two 155.52 MHz timing references
from the Timing Generator, Stratum 3 - DS1 [TG3 (DS1)] circuit packs. A switch
device on the OC48 TRMTR A/D circuit pack selects one timing reference. A
primary and secondary timing signal is provided for redundancy.
Protection Circuitry 7
High Speed Protection. 7In bidirectional ring applications, the FT-2000 OC-48
Add/Drop-Rings Terminal performs revertive bidirectional line protection
switching. The OC48 TRMTR A/D circuit pack is protection switched by the
LNCTL circuit pack in response to an external command, incoming signal failure,
or internal equipment fault.
The switch matrix on the protection OC48 TRMTR A/D circuit pack allows access
to the protection OC-48 high speed line (OC-48 point-to-point applications) or the
protection 155.52 Mb/s signals (STS-3 tributaries in bidirectional 2-fiber ring
applications) for low priority traffic or for restoration purposes.
Low Speed Protection. 7Low speed protection switching in the transmit direction is
done by selecting a 155.52 Mb/s signal from the protection DS3 or STS1E circuit
pack to substitute for a 155.52 Mb/s signal from a failed service DS3 or STS1E
circuit pack. The OC48 TRMTR A/D circuit pack also accepts the same 155.52
Mb/s signal from a pair of 1+1 protected OC (1.3 STD) circuit packs. The OC48
TRMTR A/D circuit pack selects one 155.52 Mb/s signal as the active line and the
other 155.52 Mb/s signal as the standby line. Low speed protection switching is
performed in response to commands from the LNCTL circuit pack via the BCLAN.
Dual Ring Interworking Protection. 7The OC48 TRMTR A/D circuit pack at the
primary node of a dual ring interworking application accepts an active 155.52
Mb/s signal (STS-3 tributary) from the local low speed interface circuit pack or an
identical standby 155.52 Mb/s signal (STS-3 tributary) from the secondary node.
In Release 4.1 and later releases, if an incoming DS3 or EC-1 loss-of-signal
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