Circuit Pack Descriptions
7-122 Issue 8.0 July 2002
Quick Reference Summary 7
Provisioned Modes 7
The TG3 (DS1) circuit pack can be provisioned using the craft interface terminal
(CIT) for one of the following modes:
a. Externally timed mode
In the externally timed mode (phase locked mode in releases prior to
Release 5), the TG3 (DS1) circuit pack phase locks to an external stratum
3(±4.6 ppm) or better external DS1 reference signal (1.544 MHz). The
TG3 (DS1) circuit pack may be provisioned to accept a DS1 reference
signal in the superframe or extended superframe format. It can also be
provisioned with bipolar 8-zero substitution (B8ZS) or alternate mark
inversion (AMI) line coding.
b. Through timed mode
In the through timed mode, the TG3 (DS1) circuit pack phase locks to an
OC-48 line reference signal (25.92 MHz) provided by the OC48 Receiver
(OC48 RCVR) circuit pack (FT-2000 OC-48 Add/Drop-Rings Terminal
only).
c. Free running mode
In the free running mode, the TG3 (DS1) circuit pack generates timing from
an on-board high stability fixed oscillator. The oscillator has a long-term
accuracy of ±4.6 ppm.
d. Line Timed
In the line timed mode, the TG3 (DS1) circuit pack phase locks to an
OC-48 line reference signal (25.92 MHz) provided by the OC48 Receiver
circuit pack (FT-2000 OC-48 ADR Terminal only). The direction selected (E,
W, or Auto) is determined via provisioning. Also, the method for obtaining
backup, or no backup, is determined at provisioning.
The equalization level of the DS1 reference output signals may also be
provisioned. For detailed information about provisioning, refer to Volume I,
Section 8, “Administration and Provisioning.”
Holdover Mode 7
The holdover mode can only be entered from the externally timed mode, loop
timed mode, or through timed mode. In the holdover mode, the DPLL circuit uses
storage techniques to maintain the last known good frequency of the external DS1
reference signal or line reference signal. The holdover mode is entered when the
integrity of the external DS1 reference signal or line reference signal is considered
unacceptable. In the holdover mode, the on-board oscillator frequency will not
degrade below the stratum 3 level.
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