Maintenance Description
9-34 Issue 8.0 July 2002
— Cbus: This bus allows through traffic to be routed from OC-48
high-speed line 1W to 1E, or from OC-48 high-speed line 1E to 1W.
â– OC48 Transmitter, Add/Drop [OC48 TRMTR (A/D)]:TwoOC48TRMTR
(A/D) circuit packs are required to interface with OC-48 high-speed lines
1W and 1E. If an incoming OC-48 signal defect or an internal equipment
defect is detected, the OC48 TRMTR (A/D) circuit pack transmits
maintenance signals to remote FT-2000 OC-48 Add/Drop-Rings Terminals.
The OC48 TRMTR (A/D) circuit packs have the following transmission
buses that make 2-fiber ring protection switching possible:
— Abus: This bus allows the local traffic to be added.
— Bbus: This bus allows the through traffic from the OC48 RCVR
(A/D) circuit pack to be looped back to the OC48 TRMTR (A/D)
circuit pack and bridged to the protection STS-3 tributaries of the
OC-48 high-speed line when a 2-fiber ring protection switch is
required. (Refer to Table 9-4 for the mapping between the service
STS-3 tributaries and the protection STS-3 tributaries.)
— Cbus: This bus allows through traffic to be routed from OC-48
high-speed line 1E to 1W or from OC-48 high-speed line 1W to 1E.
â– Line Controller - 4 Megabyte [LNCTL]: One LNCTL circuit pack is
required to interface with the circuit packs on OC-48 high-speed lines 1W
and 1E. The LNCTL circuit pack controls 2-fiber ring protection switching
and performs line specific computations. The LNCTL circuit pack uses the
board controller local area network (BCLAN) to communicate with the
board controllers on the OC48 TRMTR (A/D), OC48 RCVR (A/D), DS3,
STS1E, OC3 and OC12 circuit packs for OC-48 high-speed lines 1W and
1E.
â– Low Speed Interface: The FT-2000 OC-48 Add/Drop-Rings Terminal may
be equipped with up to 16 service DS3 and/or STS1E circuit packs, eight
1+1 protected OC3 circuit packs (16 unprotected), two 1+1 protected OC12
circuit packs (4 unprotected), or a mixture of DS3, STS1E and OC3 circuit
packs. If an incoming OC-48 signal defect occurs on the OC-48 high-speed
line 1W, the service low-speed interface circuit packs switch to OC-48
high-speed line 1E in response to switch requests from the LNCTL circuit
pack. When the defect clears, the service low-speed interface circuit packs
switch back (revert) to OC-48 high-speed line 1W.
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