Strasbaugh nTellect 7AF - Status Register

Pamux User’s Guide 117
Example:
CONST WatchdogTimeRegister% = &H7A
CONST MyAnalogOutputChannel% = 1
CONST MyWatchdog10MilSec% = 100
‘ Watchdog time: 1 sec = 100*10 msec
CONST MyWatchdogValue% = &H7FF ‘ Watchdog value: half scale
HaveAccess% = GetAccess%(DataPort%)
IF HaveAccess% THEN
‘ Configure watchdog timer
CALL GetUpperAndLowerBytes(MyWatchdog10MilSec%, UpperByte%, LowerByte%)
OUT ControlPort%, WatchdogTimeRegister%
OUT DataPort%, LowerByte%
OUT ControlPort%, WatchdogTimeRegister% + 1
OUT DataPort%, UpperByte%
‘ Set watchdog value
DIM WatchdogReg%
WatchdogReg% = MyAnalogOutputChannel% * 2 + &H20
CALL GetUpperAndLowerBytes(MyWatchdogValue%, UpperByte%, LowerByte%)
OUT ControlPort%, WatchdogReg%
OUT DataPort%, LowerByte%
OUT ControlPort%, WatchdogReg% + 1
OUT DataPort%, UpperByte%
ELSE
PRINT “No Access”
END IF
CALL ReleaseAccess(DataPort%)
STATUS REGISTER
The status register is at internal RAM location hex 7C. The register includes three bits:
• Bit 0 — Power-up/reset flag
• Bit 1 — Fresh data flag
• Bit 2 — Watchdog timeout flag
Bit 0 is set to 1 if the Pamux B6 brain board has been reset due to a power-up condition or a reset signal
from the host. Bit 1 is set to a 1 every time the microprocessor transfers data to and from the dual-port RAM
and can be used to indicate if the current data is fresh. Bit 2 is set to a 1 if a watchdog timeout occurs.
Bit 0 is important because it can warn the host that the brain board needs to be reconfigured due to
a loss of power. Bit 1 can be used as a warning that the host is polling too quickly and that the brain
board’s microprocessor has not had sufficient time to update the RAM.
To make use of these flags, Bit 0 should be cleared by the host after the brain board has been
configured. The flag should then be checked periodically to see if the brain board has lost its
configuration and needs to be reconfigured.
Bit 1 should be checked after gaining access to see if the data will be fresh, then the bit must be
cleared before releasing access. It is up to the host to clear this flag, or the flag will be meaningless.
Bit 2 should also be checked after gaining access to see if a watchdog timeout has occurred, then all
analog outputs should be set to new values and bit 2 of the status register cleared.
PROGRAMING WITHOUT THE PAMUX DRIVER