Reference Manual ADuCM356
REGISTER DETAILS: HIGH-SPEED DAC CIRCUITS
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DAC OFFSET WITH ATTENUATOR ENABLED (LOW-POWER MODE) REGISTER
Address: 0x400C2264, Reset: 0x00000000, Name: DACOFFSETATTEN
The LSB adjustment is typically 4.9 μV for HSDACCON, Bit 12 = 1 and HSDACCON, Bit 0 = 1. The LSB adjustment is typically 24.7 μV for
HSDACCON, Bit 12 = 1 and HSDACCON, Bit 0 = 0.
Table 134. Bit Descriptions for DACOFFSETATTEN
Bits Bit Name Settings Description Reset Access
[31:12] Reserved Reserved. 0x0 R
[11:0] VALUE DAC Offset Correction Factor. Signed number represented in twos complement format with a 0.5 LSB
precision. Used when attenuator is enabled.
0x0 R/W
0x7FF 2
10
− 0.5. Maximum positive adjustment. Results in positive full scale/2 − 0.5 LSB adjustment.
0x001 0.5. Results in 0.5 LSB adjustment.
0x000 0. No offset adjustment.
0xFFF −0.5. Results in −0.5 LSB adjustment.
0x800 −2
10
. Maximum negative adjustment. Results in negative full scale/2 adjustment.
DAC OFFSET WITH ATTENUATOR DISABLED (LOW-POWER MODE) REGISTER
Address: 0x400C2268, Reset: 0x00000000, Name: DACOFFSET
The LSB adjustment is typically 197.7 μV for HSDACCON Bit 12 = 0 and HSDACCON Bit 0 = 0. The LSB adjustment is typically 39.5 μV for
HSDACCON, Bit 12 = 0 and HSDACCON, Bit 0 = 1.
Table 135. Bit Descriptions for DACOFFSET
Bits Bit Name Settings Description Reset Access
[31:12] Reserved Reserved. 0x0 R
[11:0] VALUE DAC Offset Correction Factor. Signed number represented in twos complement format with a 0.5 LSB
precision. Used when attenuator is disabled.
0x0 R/W
0x7FF 2
10
− 0.5. Maximum positive adjustment. Results in positive full scale/2 − 0.5 LSB adjustment.
0x001 0.5. Results in 0.5 LSB adjustment.
0x000 0. No offset adjustment.
0xFFF −0.5. Results in −0.5 LSB adjustment.
0x800 −2
10
. Maximum negative adjustment. Results in negative full scale/2 adjustment.
DAC OFFSET WITH ATTENUATOR ENABLED (HIGH-POWER MODE) REGISTER
Address: 0x400C22B8, Reset: 0x00000000, Name: DACOFFSETATTENHP
Protected by the CALDATLOCK register. The LSB adjustment is typically 4.9 μV for HSDACCON, Bit 12 = 1 and HSDACCON, Bit 0 = 1. The
LSB adjustment is typically 24.7 μV for HSDACCON, Bit 12 = 1 and HSDACCON, Bit 0 = 0.
Table 136. Bit Descriptions for DACOFFSETATTENHP
Bits Bit Name Settings Description Reset Access
[31:12] Reserved Reserved. 0x0 R
[11:0] VALUE DAC Offset Correction Factor. Signed number represented in twos complement format with a 0.5 LSB
precision. Used when attenuator is enabled.
0x0 R/W
0x7FF 2
10
− 0.5. Maximum positive adjustment. Results in positive full scale/2 − 0.5 LSB adjustment.
0x001 0.5. Results in 0.5 LSB adjustment.
0x000 0. No offset adjustment.
0xFFF −0.5. Results in −0.5 LSB adjustment.
0x800 −2
10
. Maximum negative adjustment. Results in negative full scale/2 adjustment.
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