Reference Manual ADuCM356
REGISTER DETAILS: DIGITAL DIE WAKE-UP TIMER
analog.com Rev. A | 299 of 312
Table 392. Bit Descriptions for SNAP2
Bits Bit Name Settings Description Reset Access
15 Reserved Reserved. 0x0 R
[14:0] VALUE Contains a Sticky Snapshot of CNT2. This channel takes a sticky snapshot of the 47-bit WUT count in
CNT1, CNT0, and CNT2 and stores it in SNAP1, SNAP0, and SNAP2, respectively.
0x0 R
MODULO REGISTER
Address: 0x4000143C, Reset: 0x0040, Name: MOD
MOD is a read only register that makes available CNTMOD60, the modulo 60 equivalent of the CNT1 and CNT0 count values. This modulo 60
value is equal to the displacement in prescaled WUT time units past the most recent modulo 60 roll over event. A roll over is a synonym for a
modulo 60 boundary.
The WUT realigns itself to create coincident modulo 60 and modulo 1 boundaries whenever either of the following events occurs:
â–º CPU writes a new pair of values to the CNT1 and CNT0 registers to redefine the elapsed time units count while the WUT is enabled and this
posted twin write is subsequently executed.
â–º CPU enables the WUT from a disabled state using the CR0, Bit 0.
Other read only fields accessible via this register are the magnitude of the most recent increment to the WUT count (INCR) and confirmation as
to whether this increment coincided with a trim boundary. The same increment is applied by the WUT to both its absolute (32-bit) count and the
modulo 60 equivalent.
To facilitate debug and to clarify the relationship between CNTMOD60 and CNTx, the upper bits of MOD are padded with the LSBs of CNT0,
allowing CNTMOD60 and part of the main WUT count to be read out at the same time and their alignment with each other to be understood.
Table 393. Bit Descriptions for MOD
Bits Bit Name Settings Description Reset Access
[15:11] CNT0_4TOZERO Mirror of CNT0, Bits[4:0]. These bits are a mirror of CNT0, Bits[4:0], made available for
simultaneous readback along with the CNTMOD60 bit field of MOD. Having this mirror available
at the same time allows the relationship between the modulo 60 and absolute versions of the
WUT count to be better understood and debugged.
0x0 R
10 Reserved Reserved. 0x0 R
[9:6] INCR Most Recent Increment Value Added to the WUT Count in CNT1 and CNT0. INCR is the
read only value by which the WUT count has most recently been incremented. Under normal
circumstances, when the WUT is enabled, this value is one.
0x1 R
[5:0] CNTMOD60 Modulo 60 Value of the WUT Count. CNTMOD60 is the modulo 60 value of the prescaled WUT
count in CNT1 and CNT0. CNTMOD60 counts from 0 to 59 and then rolls over to 0 again.
It advances and is trimmed in tandem with the main WUT count in CNT1, CNT0, and CNT2.
CNTMOD60 is zeroed during a normal roll over from a value of 59 when advancing at a prescaled
time unit, when the CPU writes a new pair of values to the CNT1 and CNT0 registers to redefine
the elapsed time count while the WUT is enabled and this posted twin write is executed, when
the CPU enables the WUT from a disabled state using the CNTEN bit of CR0, or while the WUT
is enabled via CNTEN. The degree of prescaling in the WUT is changed by PRESCALE2EXP in
CR1.
0x0 R
COUNT 2 REGISTER
Address: 0x40001440, Reset: 0x0000, Name: CNT2
CNT2 contains the fractional part of the WUT count, where the count is denominated in prescaled time units and is given by CNT1, CNT0, and
CNT2. The overall resolution of the real-time count, including the fractional bits in CNT2, is one 32 kHz clock period.
CNT2 makes available to the CPU a read only view of the internal sequence count in the WUT prescaler as it steps its way (in units of one 32
kHz period) from all zeros to all ones across the number of prescale sequence bits given by the PRESCALE2EXP field of CR1. By completely
traversing such a sequence, the prescaler effectively advances the main nonfractional part of the WUT count in CNT1 and CNT0 by one
prescaled time unit. The prescale sequence count thus equates to the fractional part of the main WUT count.
To Next Page
Loading...
Need help?
General