Reference Manual ADuCM356
REGISTER DETAILS: CLOCK ARCHITECTURE
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Table 16. Bit Descriptions for CLKEN0 (Continued)
Bits Bit Name Settings Description Reset Access
1 SLPWUTDIS Sleep and Wake-Up Timer Clock Disable. 0x0 R/W
0 Turn on sleep wake-up timer clock.
1 Turn off sleep wake-up timer clock.
0 WDTDIS Watchdog Timer Clock Disable. 0x0 R/W
0 Turn on watchdog timer clock.
1 Turn off watchdog timer clock.
KEY PROTECTION FOR OSCCON REGISTER
Address: 0x400C0A0C, Reset: 0x0000, Name: OSCKEY
Table 17. Bit Descriptions for OSCKEY
Bits Bit Name Settings Description Reset Access
[15:0] OSCKEY 0xCB14 Oscillator Control Key Register. The OSCCON register is key-protected. Write 0xCB14 to OSCKEY before
accessing the OSCCON register. A write to any other register before writing to OSCCON returns the
protection to the lock state.
0x0 R/W
OSCILLATOR CONTROL REGISTER
Address: 0x400C0A10, Reset: 0x0303, Name: OSCCON
The OSCCON register is key protected. To unlock this protection, write 0xCB14 to the OSCKEY register before writing to the OSCCON register.
A write to any other register before writing to the OSCCON register returns the protection to the lock state.
Table 18. Bit Descriptions for OSCCON
Bits Bit Name Settings Description Reset Access
[15:11] Reserved Reserved. 0x0 R
10 HFXTALOK Status of HFXTAL Oscillator. This bit indicates when the oscillator is stable after it is enabled. This bit is
not a monitor and does not indicate a subsequent loss of stability.
0x0 R
0 Oscillator is not yet stable or is disabled.
1 Oscillator is enabled, stable, and ready for use.
9 HFOSCOK Status of High Frequency Oscillator. This bit indicates when the oscillator is stable after it is enabled.
This bit is not a monitor and does not indicate a subsequent loss of stability.
0x1 R
0 Oscillator is not yet stable or is disabled.
1 Oscillator is enabled, stable, and ready for use.
8 LFOSCOK Status of Low Frequency Oscillator. This bit indicates when the oscillator is stable after it is enabled.
This bit is not a monitor and does not indicate a subsequent loss of stability.
0x1 R
0 Oscillator is not yet stable or is disabled.
1 Oscillator is enabled, stable, and ready for use.
[7:3] Reserved Reserved. 0x0 R
2 HFXTALEN HFXTAL Oscillator Enable. This bit is used to enable or disable the oscillator. The oscillator must be
stable before use. This bit must be set before the SYSRESETREQ system reset can be initiated.
0x0 R/W
0 The HFXTAL oscillator is disabled and placed in a low-power state.
1 The HFXTAL oscillator is enabled.
1 HFOSCEN High Frequency Oscillator Enable. This bit is used to enable or disable the oscillator. The oscillator
must be stable before use. This bit must be set before the SYSRESETREQ system reset can be
initiated.
0x1 R/W
0 The high frequency oscillator is disabled and placed in a low-power state.
1 The high frequency oscillator is enabled.
0 LFOSCEN Low Frequency Oscillator Enable. This bit is used to enable or disable the oscillator. The oscillator must
be stable before use.
0x1 R/W
0 The low frequency oscillator is disabled and placed in a low-power state.
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