Reference Manual ADuCM356
REGISTER DETAILS: LOW POWER TIA/POTENTIOSTAT AND DAC CIRCUITS
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LPDAC1 DATA OUT REGISTER
Address: 0x400C212C, Reset: 0x00000000, Name: LPDACDAT1
Table 116. Bit Descriptions for LPDACDAT1
Bits Bit Name Settings Description Reset Access
[31:18] Reserved Reserved. 0x0 R
[17:12] DACIN6 6-Bit Value, 1 LSB = 34.375 mV. A low-power DAC1 6-bit output data register values between 0 and 0x3F
is expected to set 6-bit output voltage.
0x0 R/W
000000 0.2 V.
111111 2.366 V.
[11:0] DACIN12 12-Bit Value, 1 LSB = 537 μV. A low-power DAC1 12-bit output data register value between 0 and 0xFFF
is expected to set 12-bit output voltage.
0x0 R/W
0x000 0.2 V.
0xFFF 2.4 V.
LPDAC1 SWITCH CONTROL REGISTER
Address: 0x400C2130, Reset: 0x00000000, Name: LPDACSW1
Table 117. Bit Descriptions for LPDACSW1
Bits Bit Name Settings Description Reset Access
[31:6] Reserved Reserved. 0x0 R
5 LPMODEDIS Switch Control. Controls switches connected to the output of LPDAC1. 0x0 R/W
0 Switches connected to output of low-power DAC configured via LPDACCON1, Bit 5. Default.
1 Overrides LPDACCON1, Bit 5. Switches connected to LPDAC1 output are controlled via LPDACSW1,
Bits[4:0].
4 SW4 LPDAC1 SW4 Control. 0x0 R/W
0 Disconnect direct connection of VBIAS0 DAC output to positive input of low-power Amplifier 1. Default.
1 Connect VBIAS1 DAC output directly to positive input of low-power Amplifier 1.
3 SW3 LPDAC1 SW3 Control. 0x0 R/W
0 Disconnect VBIAS1 DAC output from low-pass filter and VBIAS1 pin.
1 Connect VBIAS1 DAC output to the low-pass filter and VBIAS1 pin. Default.
2 SW2 LPDAC1 SW2 Control. R/W
0 Disconnect direct connection of VZERO0 DAC output to the low-power TIA0 positive input. Default. 0x0
1 Connect VZERO0 DAC output directly to the low-power TIA0 positive input.
1 SW1 Low-Power DAC1 SW1 Control. 0x0 R/W
0 Disconnect VZERO1 DAC output from the low-pass filter and VZERO1 pin.
1 Connect VZERO1 DAC output to the low-pass filter and VZERO1 pin. Default.
0 SW0 Low-Power DAC1 SW0 Control. 0x0 R/W
0 Disconnect VZERO1 DAC output from the high-speed TIA positive input. Default.
1 Connect VZERO1 DAC output to the high-speed TIA positive input.
LPDAC1 CONTROL REGISTER
Address: 0x400C2134, Reset: 0x00000002, Name: LPDACCON1
Table 118. Bit Descriptions for LPDACCON1
Bits Bit Name Settings Description Reset Access
[31:7] Reserved Reserved. 0x0 R
6 WAVETYPE Low-Power DAC Source. 0x0 R/W
0 Direct from LPDACDAT1.
1 Waveform generator.
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