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Analog Devices ADuCM356 User Manual

Analog Devices ADuCM356
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Reference Manual ADuCM356
DMA CONTROLLER
analog.com Rev. A | 162 of 312
until the DMA_DONE interrupt is received does not guarantee
expected behavior. It is recommended that the user not update the
descriptor before receiving DMA_DONE.
Example Code: Define DMA Structures
To define DMA structures, use the following code:
memset(dmaChanDesc,0x0,sizeof(dmaChanâ–º
Desc)); // Set up the
DMA base address pointer register.
uiBasPtr = (unsigned int)&dmaChanâ–º
Desc; // Set up the DMA base pointer.
pADI_DMA->CFG = 1; //
Enable DMA controller
pADI_DMA->PDBPTR = uiBasPtr;
SOURCE DATA END POINTER
The SRC_END_PTR memory location stores the address of the
last location from which data is read as part of a DMA transfer. This
memory location must be programmed with the end address of the
source data before the controller can perform a DMA transfer. The
controller reads this memory location when it starts the first DMA
data transfer. The DMA controller does not write to this memory
location.
Table 191. Source Data End Pointer
Bits Name Description
[31:0] SRC_END_PTR The end address of the source data
DESTINATION DATA END POINTER
The DST_END_PTR memory location stores the address of the
last location to which data is written as part of a DMA transfer.
This memory location must be programmed with the end address
of the destination data before the controller can perform a DMA
transfer. The controller reads this memory location when it starts
the first DMA data transfer. The DMA controller does not write to
this memory location.
Table 192. Destination Data End Pointer
Bits Name Description
[31:0] DST_END_PTR The end address of the source data
CONTROL DATA CONFIGURATION
For each DMA transfer, the CHNL_CFG memory location provides
the control information for the DMA transfer to the controller.
Table 193. CHNL_CFG Control Data Configuration
Bit(s) Name
Source
Data Width Setting Description
[31:30] DST_INC Destination Address Increment. The address increment depends on the source data width.
Byte
00 Source address increment is byte.
01 Source address increment is half word.
10 Source address increment is word.
11 No increment. Address remains set to the value contained in the DST_END_PTR memory location.
Half word
00 Reserved.
01 Source address increment is half word.
10 Source address increment is word.
11 No increment. Address remains set to the value contained in the DST_END_PTR memory location.
Word
00 Reserved.
01 Reserved.
10 Source address increment is word.
11 No increment. Address remains set to the value contained in the DST_END_PTR memory location.
[29:28] Reserved Undefined. Write as zero.
[27:26] SRC_INC Source Address Increment. The address increment depends on the source data width.
Byte
00 Source address increment is byte.

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Analog Devices ADuCM356 Specifications

General IconGeneral
BrandAnalog Devices
ModelADuCM356
CategoryMicrocontrollers
LanguageEnglish