Analog Devices ADuCM356 User Manual

Reference Manual ADuCM356
REGISTER DETAILS: CACHE (FLCC)
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CACHE STATUS REGISTER
Address: 0x40018058, Reset: 0x00000000, Name: STAT
Table 243. Bit Descriptions for STAT
Bits Bit Name Settings Description Reset Access
[31:1] Reserved Reserved. 0x0000000 R
0 ICEN Instruction Cache Enable. 0x0 R
0 Disabled. All AHB accesses take place via flash memory.
1 Enabled. Instruction cache enabled for AHB accesses.
CACHE SETUP REGISTER
Address: 0x4001805C, Reset: 0x00000000, Name: SETUP
The cache user key is required to enable a write to this location. The key is cleared after a write to this register.
Table 244. Bit Descriptions for SETUP
Bits Bit Name Settings Description Reset Access
[31:1] Reserved Reserved. 0x0000000 R
0 ICEN Instruction Cache Enable. 0x0 R/W
0 Disabled. All AHB accesses take place via flash memory.
1 Enabled for AHB accesses.
CACHE KEY REGISTER
Address: 0x40018060, Reset: 0x00000000, Name: KEY
Table 245. Bit Descriptions for KEY
Bits Bit Name Settings Description Reset Access
[31:0] VALUE Cache Key Register. Enter 0xF123F456 to set the user key. Returns 0x0 if read. The key is cleared
automatically after writing to the setup register.
0x00000000 W

Analog Devices ADuCM356 Specifications

General

Brand	Analog Devices
Model	ADuCM356
Category	Microcontrollers
Language	English