Reference Manual ADuCM356
REGISTER DETAILS: ANALOG DIE CIRCUITRY
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AFE CONFIGURATION REGISTER
Address: 0x400C2000, Reset: 0x00080000, Name: AFECON
Specific bits in these registers are relevant to particular blocks in the analog die. The relevant bits for each block are as follows:
â–º Bits relevant to the ADC block are Bit 16, Bit 15, Bit 13, Bit 12, Bit 8, Bit 7, and Bit 5.
â–º Bits relevant to the high-speed TIA block are Bit 11 and Bit 5.
â–º Bits relevant to the high-speed DAC block are Bit 21, Bit 20, Bit 14, Bit 10, Bit 9, and Bit 5.
Table 52. Bit Descriptions for AFECON
Bits Bit Name Settings Description Reset Access
[31:22] Reserved Reserved. 0x0 R
21 HSDACBUFEN Enable DC DAC Buffer. Enable the buffer for the high impedance output of the DC DAC. 0x0 R/W
0 Disable DC DAC buffer.
1 Enable DC DAC buffer.
20 HSDACREFEN High-Speed DAC Reference Enable. 0x0 R/W
0 Reference disable. Clear to 0 to disable the high-speed DAC reference.
1 Reference enable. Set to 1 to enable the high-speed DAC reference.
19 ALDOILIMITEN Analog LDO Buffer Current Limiting. Enable the AFE analog LDO buffer current limiting. If
enabled, LDO buffer current limiting limits the current drawn from an external battery when
charging the capacitor on AVDD_REG.
0x1 R/W
0 Analog LDO buffer current limiting enabled.
1 Analog LDO buffer current limiting disabled.
[18:17] Reserved Reserved. 0x0 R
16 SINC2EN ADC Output 50 Hz or 60 Hz Filter Enable. Enable 50 Hz or 60 Hz supply rejection
filter. When the sinc2 digital filter is used, clear this bit and set it before restarting ADC
conversions.
0x0 R/W
0 Supply rejection filter disabled. Disable sinc2 (50 Hz/60 Hz digital filter). Disable this bit for
impedance measurements.
1 Supply rejection filter enabled. Enable sinc2 (50 Hz/60 Hz digital filter).
15 DFTEN DFT Hardware Accelerator Enable. Enable the DFT hardware acceleration block. 0x0 R/W
0 DFT hardware accelerator disabled.
1 DFT hardware accelerator enabled.
14 WAVEGENEN Waveform Generator Enable. Enable waveform generator. 0x0 R/W
0 Waveform generator disabled.
1 Waveform generator enabled.
13 TEMPCONVEN0 ADC Temperature Sensor 0 Convert Enable. Enables ADC temperature channel
conversion. When the temperature conversion is complete, the result is available in the
TEMPSENSDAT0 register. After the conversion, this bit is reset to 0.
0x0 R/W
0 Temperature Channel 0 reading disabled.
1 Temperature Channel 0 reading enabled.
12 TEMPSENSEN0 ADC Temperature Sensor 0 Channel Enable. Enable temperature sensor. 0x0 R/W
0 Temperature sensor disabled. The temperature sensor is powered down.
1 Temperature sensor enabled. The temperature sensor is powered up but no temperature
readings are performed unless the TEMPCONVEN0 bit = 1.
11 HSTIAEN Enable High Speed TIA. 0x0 R/W
0 High-speed TIA disabled.
1 High-speed TIA enabled.
10 INAMPEN Enable Excitation Instrumentation Amplifier on the High-Speed DAC Output. Enables
instrumentation amplifier.
0x0 R/W
0 High-speed DAC programmable instrumentation amplifier disabled.
1 High-speed DAC programmable instrumentation amplifier enabled.
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