Reference Manual ADuCM356
REGISTER DETAILS: ANALOG DIE CIRCUITRY
analog.com Rev. A | 52 of 312
Table 52. Bit Descriptions for AFECON (Continued)
Bits Bit Name Settings Description Reset Access
9 EXBUFEN Enable Excitation Buffer on High-Speed DAC Output. 0x0 R/W
0 High-speed DAC excitation buffer disabled.
1 High-speed DAC excitation buffer enabled.
8 ADCCONVEN ADC Conversion Start Enable. 0x0 R/W
0 ADC idle. ADC powered on but not converting.
1 ADC conversions enabled.
7 ADCEN ADC Power Enable. Enable ADC. 0x0 R/W
0 ADC disabled. ADC is powered off.
1 ADC enabled. ADC is powered on. The ADCCONVEN bit must be set to start conversions.
6 HSDACEN High-Speed DAC Enable. Enable the high-speed DAC and its reconstruction filter. This bit
only enables the analog block, not including the DAC waveform generator.
0x0 R/W
0 High-speed DAC disabled.
1 High-speed DAC enabled.
5 HPREFDIS Disable High-Power Reference. This is the power-down signal for the high-
power reference.
0x0 R/W
0 High-power reference enabled. Must be cleared to 0 for the ADC and high-speed DAC to
operate.
1 High-power reference disabled. Power down the reference.
4 Reserved Reserved. 0x0 R/W
[3:0] Reserved Reserved. 0x0 R
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