Reference Manual ADuCM356
SERIAL PERIPHERAL INTERFACES
analog.com Rev. A | 242 of 312
able receive DMA request. SPI_CNT.VALUE =
XXX;
//number of bytes to be received.
A = SPI_RX; //dummy read.
The DMA transfer stops when the appropriate number of clock
cycles have been generated. All DMA data transfers are 16-bit
transfers. Program the DMA accordingly. For example, if 16 bytes
of data are to be received over the SPI, program the DMA to
perform eight 16-bit transfers. If 17 bytes are to be received, nine
16-bit transfers are required. The additional bytes are padded for
the final DMA transfer. Data errors occur if the DMA transfers are
programmed as byte wide transfers.
The DMA transfer stops when the appropriate number of bytes
have been transferred. The DMA buffer must be of the same size
as SPIx_CNT to generate a DMA interrupt when the transfer is
complete. SPIx_CNT must always be ≥2.
SPI AND POWER-DOWN MODES
In initiator mode, before entering power-down mode, disable the
SPI block in SPIx_CTL, Bit 0. In target mode, in either mode of
operation (interrupt driven or DMA), the chip select line level must
be checked via the GPIO registers using SPIx_STAT, Bit 11 to
ensure that the SPI is not communicating and that the SPI block
is disabled while the chip select line is high. At power-up, the SPI
block can be reenabled. While being powered down, the following
fields are retained:
â–º All bit fields of SPIx_CTL register, except SPIx_CTL, Bit 0 is
reset to 0 on power-up, which allows a clean start of the design
at wakeup.
â–º SPIx_IEN, Bits[2:0] bit field.
â–º SPIx_DIV, Bits[5:0] bit field.
â–º SPIx_RD_CTL, Bit 8.
â–º SPIx_FLOW_CTL, Bit 4.
All other bit fields are not retained. As such, they are all reset
on power-up. On exiting the power-down mode, the software repro-
grams all nonretained registers as required. Then, the SPI block
must be reenabled by setting the SPIx_CTL, Bit 0.
To Next Page
Loading...
Need help?
General