Reference Manual ADuCM356
REGISTER DETAILS: FLASH CACHE CONTROLLER (FLCC)
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Table 239. Bit Descriptions for ECC_CFG (Continued)
Bits Bit Name Settings Description Reset Access
1 INFOEN Information Space ECC Enable Bit. ECC is enabled by default for information space. Clearing this bit
disables ECC in information space. This bit is not key protected.
0x1 R/W
0 EN ECC Enable. Set this bit to enable ECC on user space. ECC is enabled on all future flash reads in user
space from any address between ECC_CFG, Bits[31:8] through the top of user space (inclusive). When
cleared (or accessing addresses outside the enabled range), the flash controller returns the raw data in
response to both ICode and DCode reads of user space. No error corrections are made or reported.
0x0 R/W