Circuit Pack Descriptions
Issue 8.0 July 2002
7-47
Timing Circuitry 7
The STS1E circuit pack accepts two 155.52 MHz clock signals from the Timing
Generator, Stratum 3 - DS1 [TG3 (DS1)] circuit packs (primary and secondary).
During normal operation, the board controller selects the clock signal that is used.
The selected clock signal (155.52 MHz) is connected to the byte processor that
provides a divide-by-3 circuit. The divide-by-3 circuit generates a 51.84 MHz
signal and sends it to the transmit and receive pointer processors,
transmit/receive byte processor, and the line driver circuits.
Protection Circuitry 7
Low Speed Interface Protection. 7Optional 1xM (M≤16) revertive STS1E circuit pack
protection is provided. An STS-1 protection bus is implemented with on-board
relays on the STSX-1 side and with selectors at the 155.52 Mb/s level on the
service and protection OC48 Transmitter and OC48 Receiver circuit packs. The
Low Speed Switch (LSSW) circuit pack provides power to these relays and
controls their operation. If the +5 volt power on the STS1E circuit pack fails, the
relays are still operational and controlled by the LSSW and LNCTL circuit packs. If
the LNCTL circuit pack is removed, the relays will remain in their current state.
Shorting contacts are provided in the STS1E circuit pack backplane connector so
that when the circuit pack is removed, the STSX-1 cables short through to the
LSSW circuit packs for routing to the protection STS1E circuit pack. When the
STS1E circuit pack is reinserted, the relays are in the protection state until the
LNCTL circuit pack determines that the circuit pack is good.
High Speed Protection. 7If an OC-48 signal fails or is degraded, the LNCTL circuit
pack broadcasts a switch request to the board controllers on the STS1E circuit
packs via the BCLAN. In the transmit direction, the STS1E circuit packs perform
head-end bridges. In the FT-2000 OC-48 Add/Drop-Rings Terminal, the 155.52
Mb/s signals are provided to the OC48 TRMTR A/D circuit packs for lines 1E and
1W. In the receive direction, the STS1E circuit packs perform tail-end switches. In
the FT-2000 OC-48 Add/Drop-Rings Terminal, selector circuitry on the STS1E
circuit packs accepts the 155.52 Mb/s signals from the OC48 RCVR A/D circuit
pack opposite of the configured direction.
Dual Ring Interworking Protection. 7The STS1E circuit pack at the primary node of
a dual ring interworking application monitors the EC-1 signal(s) coming from the
other ring. If an incoming EC-1 loss-of-signal condition is detected, the STS1E
circuit pack notifies the LNCTL circuit pack. The LNCTL circuit pack broadcasts an
automatic switch request to the board controller on the OC48 TRMTR circuit pack
via the BCLAN. In the add (toward to OC-48 line) direction only, the OC48 TRMTR
circuit pack switches to (selects) the standby 155.52 Mb/s signal (STS-3 tributary)
from the secondary node. In Release 7 and later releases, the OC48 TRMTR
circuit pack may switch to (select) the standby 51.84 Mb/s signal (STS-1 tributary)
from the secondary node. This completes the circuit from the secondary node to
the termination node in the ring.
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