Circuit Pack Descriptions
7-56 Issue 8.0 July 2002
the STS-3/3c signal into three STS-1 signals (51.84 Mb/s) and outputs the three
STS-1 signals and a common clock signal to the receive pointer processor.
The receive pointer processor performs frequency adjustment and pointer
processing on the three received STS-1 signals. This synchronizes the STS-1
signals to the 51.84 MHz system clock. The 51.84 MHz clock signal is obtained by
dividing the 155.52 MHz from the TG3 (DS1) circuit pack by three. The
divide-by-three circuit for the receive side is part of the OC-3 line STS-3 byte
processor. The three STS-1 signals are then sent to the OC-3 line STS-3 byte
processor.
The OC-3 line STS-3 byte processor scrambles and multiplexes the three STS-1
signals back to one STS-3/3c signal (155.52 Mb/s). The electrical-to-optical
module receives the STS-3/3c signal and converts it to an OC-3 optical signal
(155.52 Mb/s) for transmission. Fiber access to the OC3 (1.3 STD) circuit pack is
via a fixed
ST
-type buildout block and a removable
ST
-type, FC/PC-type, or
SC-type lightguide buildout on the circuit pack faceplate (labeled OUT).
Lightguide buildouts are chosen based on the attenuation desired, the type of
connector interface, and the type of lightguide jumpers (single-mode or
multimode). All factory-equipped OC3 (1.3 STD) circuit packs come with a
removable
ST
-type 7.1-dB lightguide buildout. When installing or removing
lightguide buildouts, do not pull the beam (front tab) outward. Pulling the beam
(front tab) outward could result in breaking the beam (front tab).
Control Circuitry 7
The board controller circuit controls all the circuit pack activities. The board
controller circuit interfaces with the LNCTL circuit pack using the board controller
local area network (BCLAN). The OC3 (1.3 STD) circuit pack reports the status of
the circuit pack and the incoming OC-3 and STS-3/3c signals, as well as the
circuit pack inventory information (CLEI code, serial number, etc.). The LNCTL
circuit pack uses the status information for fault detection and isolation. The OC3
(1.3 STD) circuit pack also responds to control signals from the LNCTL circuit
pack.
Overhead Controller Circuitry 7
In Release 6 and later releases, the transport overhead hyperchannel (TOH)
circuitry provides access to the data communications channel (DCC) of the OC-3
line. Access is only provided to the D1-D3 overhead bytes of the DCC. In the
LAA10B OC-3 circuit pack, the transport overhead hyperchannel circuitry also
inserts the S1 Byte for synchronization messaging in the receive direction (toward
theOC-3line).
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