Xilinx Zynq-7000 User Manual

Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 31
UG586 November 30, 2016
www.xilinx.com
Chapter 1: DDR3 and DDR2 SDRAM Memory Interface Solution
Xilinx 7 series devices using stacked silicon interconnect (SSI) technology have super logic
regions (SLRs). Memory interfaces cannot span across SLRs. If the device selected or a
compatible device that is selected has SLRs, the MIG tool ensures that the interface does
not cross SLR boundaries.
1. Select any of the compatible FPGAs in the list. Only the common pins between the target
and selected FPGAs are used by the MIG tool. The name in the text box signifies the
target FPGA selected.
2. Click Next to display the Memory Selection page.
X-Ref Target - Figure 1-15
Figure 1-15: Pin-Compatible 7 Series FPGAs
UG586_c1_10_110610
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Xilinx Zynq-7000 Specifications

General

Brand	Xilinx
Model	Zynq-7000
Category	Motherboard
Language	English