Xilinx Zynq-7000 User Manual

Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 655
UG586 November 30, 2016
www.xilinx.com
Chapter 5: Multicontroller Design
Creating 7 Series FPGA Multicontroller Block Design
Memory Selection
Memory interface selection is different for a multicontroller design compared with a single
controller design. Select the number of controllers for each memory interface on the
Memory Selection page (Figure 5-15).
X-Ref Target - Figure 5-15
Figure 5-15: Memory Selection Page
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Xilinx Zynq-7000 Specifications

General

Series	Zynq-7000
Number of Cores	Dual-core
Processor Speed	Up to 1 GHz
Device Type	SoC
Logic Cells	Up to 350K
DSP Slices	Up to 900
External Memory Interfaces	DDR3, DDR2, LPDDR2
I/O Standards	LVCMOS, HSTL, SSTL
Operating Temperature	-40°C to +100°C (Industrial), 0°C to +85°C (Commercial)
Package Options	Various BGA packages
I/O Voltage	3.3V