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Xilinx Zynq-7000 User Manual

Xilinx Zynq-7000
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Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 659
UG586 November 30, 2016
www.xilinx.com
Chapter 5: Multicontroller Design
Vivado Integrated Design Flow for MIG
1. After clicking Generate, the Generate Output Products window appears. This window
has the Out-of-Context Settings as shown in Figure 5-19.
X-Ref Target - Figure 5-19
Figure 5-19: Generate Output Products Window
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Xilinx Zynq-7000 Specifications

General IconGeneral
SeriesZynq-7000
Number of CoresDual-core
Processor SpeedUp to 1 GHz
Device TypeSoC
Logic CellsUp to 350K
DSP SlicesUp to 900
External Memory InterfacesDDR3, DDR2, LPDDR2
I/O StandardsLVCMOS, HSTL, SSTL
Operating Temperature-40°C to +100°C (Industrial), 0°C to +85°C (Commercial)
Package OptionsVarious BGA packages
I/O Voltage3.3V

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