Xilinx Zynq-7000

Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 32
UG586 November 30, 2016
www.xilinx.com
Chapter 1: DDR3 and DDR2 SDRAM Memory Interface Solution
Creating 7 Series FPGA DDR3 Memory Controller Block Design
Memory Selection
This page displays all memory types that are supported by the selected FPGA family.
1. Select the DDR3 SDRAM controller type.
2. Click Next to display the Controller Options page (Figure 1-16).
X-Ref Target - Figure 1-16
Figure 1-16: Memory Type and Controller Selection
UG586_c1_11_120311
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