Xilinx Zynq-7000 User Manual

Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 568
UG586 November 30, 2016
www.xilinx.com
Chapter 4: LPDDR2 SDRAM Memory Interface Solution
Simulation Flow Using IES and VCS Script Files
To run the simulation, go to this directory:
<project_dir>/<Component_Name>_ex/imports
For a project created with the name set as project_1 and the Component Name entered
in Vivado IDE as mig_7series_0, go to the directory as follows:
project_1/mig_7series_0_ex/imports
IES and VCS simulation scripts are meant to be executed only in Linux operating systems.
The ies_run.sh and vcs_run.sh files are the executable files for running simulations
using IES and VCS simulators respectively. Library files should be added to the
ies_run.sh and vcs_run.sh files respectively. See the readme.txt file for details
regarding simulations using IES and VCS.
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Xilinx Zynq-7000 Specifications

General

Series	Zynq-7000
Number of Cores	Dual-core
Processor Speed	Up to 1 GHz
Device Type	SoC
Logic Cells	Up to 350K
DSP Slices	Up to 900
External Memory Interfaces	DDR3, DDR2, LPDDR2
I/O Standards	LVCMOS, HSTL, SSTL
Operating Temperature	-40°C to +100°C (Industrial), 0°C to +85°C (Commercial)
Package Options	Various BGA packages
I/O Voltage	3.3V