Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 364
UG586 November 30, 2016
www.xilinx.com
Chapter 2: QDR II+ Memory Interface Solution
Proper Write and Read Commands
When sending write and read commands, you must properly assert and deassert the
corresponding UI inputs. See User Interface, page 319 and Interfacing with the Core
through the Client Interface, page 321 for full details. The test bench design provided
within the example design can be used as a further source of proper behavior on the UI.
To debug data errors on the QDR II+ SRAM interface, it is necessary to pull the UI signals
into the simulation waveform.
In the Questa Advanced Simulator Instance window, highlight u_ip_top to display the
necessary UI signals in the Objects window, as shown in Figure 2-59. Highlight the user
interface signals noted in Table 2-15, page 361, right-click, and select Add > To Wave >
Selected Signals.
Figure 2-60 and Figure 2-61 show example waveforms of a write and read on both the user
interface and the QDR II+ interface.
X-Ref Target - Figure 2-59
Figure 2-59: Questa Advanced Simulator Instance Window
X-Ref Target - Figure 2-60
Figure 2-60: User Interface Write and Read
X-Ref Target - Figure 2-61
Figure 2-61: QDR II+ Interface Write and Read
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