Xilinx Zynq-7000 User Manual

Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 390
UG586 November 30, 2016
www.xilinx.com
Chapter 3: RLDRAM II and RLDRAM 3 Memory Interface Solutions
1. Select any of the compatible FPGAs in the list. Only the common pins between the target
and selected FPGAs are used by the MIG tool. The name in the text box signifies the
target FPGA selected.
2. Click Next to display the Memory Selection page.
Creating the 7 Series FPGAs RLDRAM II/RLDRAM 3 Memory Design
Memory Selection
This page displays all memory types that are supported by the selected FPGA family.
1. Select the RLDRAM II or RLDRAM 3 controller type.
2. Click Next to display the Controller Options page.
X-Ref Target - Figure 3-15
Figure 3-15: Pin-Compatible 7 Series FPGAs
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Xilinx Zynq-7000 Specifications

General

Brand	Xilinx
Model	Zynq-7000
Category	Motherboard
Language	English