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Xilinx Zynq-7000

Xilinx Zynq-7000
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Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 666
UG586 November 30, 2016
www.xilinx.com
Chapter 5: Multicontroller Design
Invoking the MIG tool from the Vivado Design Suite is the same as with single controller
designs. See the appropriate memory interface chapter in this document for more
information. The MIG GUI pages that are different for multicontroller designs are explained
in this chapter.
X-Ref Target - Figure 5-28
Figure 5-28: Recustomize IP
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