xx Issue 8.0 June 2002
Figures
5 Control, Transmission, and
Synchronization Interfaces
5-1 System Control Architecture for the FT-2000
OC-48 Add/Drop-Rings Terminal 5-2
5-2 System Control Architecture for the FT-2000
OC-48 Repeater Bay 5-3
5-3 FT-2000 OC-48 Add/Drop-Rings Terminal for
2-Fiber Rings Transmission Block Diagram 5-5
5-4 FT-2000 OC-48 Repeater Bay Transmission
Block Diagram 5-9
5-5 Free Running Synchronization 5-11
5-6 Through Timed Synchronization (FT-2000 OC-48
Add/Drop-Rings Terminal) 5-13
5-7 Through Timed Synchronization (FT-2000 OC-48
Repeater Bay) 5-14
5-8 Loop Timed Synchronization 5-15
5-9 Externally Timed Synchronization 5-17
5-10 Free Running/Free Running Configuration 5-21
5-11 Free Running/Through Timed Configuration 5-22
5-12 Externally Timed/Through Timed Configuration 5-23
5-13 Phase Locked/Phase Locked Configuration 5-24
5-14 Phase Locked/Phase Locked Configuration
[LAA18 TG3 (DS1) Circuit Pack] 5-25
5-15 Externally Timed/Externally Timed Configuration 5-26
5-16 Example of a Ring Application with One Node
Provisioned Free Running and All Other Nodes
Provisioned Through Timed (Without Timing Drops) 5-28
5-17 Example of a Ring Application with One Node
Provisioned Free Running and All Other Nodes
Provisioned Line Timed (Without Timing Drops) 5-29
5-18 Example of a Ring Application with One Node
Provisioned Externally Timed and All Other Nodes
Provisioned Through Timed (Without Timing Drops) 5-31
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