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Xilinx Zynq-7000

Xilinx Zynq-7000
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Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 526
UG586 November 30, 2016
www.xilinx.com
Chapter 4: LPDDR2 SDRAM Memory Interface Solution
MIG outputs are generated with the folder name <component name>.
IMPORTANT: Only alphanumeric characters can be used for <component name>. Special characters
cannot be used. This name should always start with an alphabetical character and can end with an
alphanumeric character.
3. Click Next to display the Pin Compatible FPGAs page.
X-Ref Target - Figure 4-14
Figure 4-14: MIG Output Options
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