HIGH DATA RATE RECEIVER
HDR-4G+ USER’S MANUAL
Ref. DTU 100782
Is.Rev 3.5
Date: June 1, 2021
© Safran Data Systems – IMP000074 e14r1
This document is the property of Safran Data Systems.
It cannot be duplicated or distributed without expressed written consent.
Frame Synchronization & Ambiguity Resolution 3.4.2
Frame synchronization is performed only if parameter Frame Synchronizer is set to on. If Frame
Synchronizer is set to off, raw data mode is activated (used with ingestion capability).
Frame Synchronization Strategy 3.4.2.1
The frame synchronizer strategy consists in finding the synchronization word which marks the
beginning of the frame in the signals (I in BPSK, I or Q or I & Q in QPSK, 1 & 2 &3 in 8PSK…) output
by the bit synchronizer and in reacting correctly to a loss of lock. This process is illustrated by next
figure:
SEARCH phase (S):
In this mode, the frame synchronizer compares the signal bit by bit, until it matches the
expected synchronization word to within n bits where « n » is a programmable error factor,
referred to as the synchronization threshold (SYN). The synchronization threshold can vary from
0 to 15 (inclusive).
A programmable mask can also be applied to the synchronization word to ignore corrupted bits
in the synchronization word resulting from a spacecraft failure.
CHECK phase (C):
Before moving onto the LOCK mode, the frame synchronizer will check « i » consecutive
occurrences of the synchronization word (to within n errors). The contents of the telemetry block
between two synchronization words is not checked. During this phase, any occurrence of an
incorrect synchronization word returns the frame synchronizer to the SEARCH mode. « i » is
programmable between 0 and 15 (inclusive) and referred as the CTL (Check-To-Lock)
threshold. To switch from SEARCH to LOCK, the frame synchronizer must receive i+1 correct
synchronization words except when i = 0 (in that case, the frame synchronizer will transmit
frames starting from the frame containing the first occurrence of a correct synchronization
word).
LOCK phase (L):
In the LOCK mode, the frame synchronizer merely checks the occurrence of a new
synchronization word (to within n errors) every frame. The window in which the synchronization
word should be found is enlarged by N bits (N = bit slip parameter = 0, 1 or 2 bits) to cope with
potential bit slip in the telemetry demodulation process.
FLYWHEEL phase (F):
Transmission errors (signal heavily affected by noise) or loss of PSK demodulator lock may
occur: the frame synchronizer will then only return to SEARCH mode after « j » consecutive
occurrences of incorrect synchronization words (number of errors greater than the
synchronization threshold). « j » is programmable between 0 and 15 (inclusive) referred to as
the LTS (Lock-To-Search) threshold.
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