Safran CORTEX Series - Test Modulator Board; Demodulator Board; I;O Connectors

HIGH DATA RATE RECEIVER
HDR-4G+ USER’S MANUAL
Ref. DTU 100782
Is.Rev 3.5
Date: June 1, 2021
© Safran Data Systems – IMP000074 e14r1
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It cannot be duplicated or distributed without expressed written consent.
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Test Modulator Board 1.4.3.2
Test Modulator is an optional board for test purposes:
 PCM generation: internal data (pseudo-random or pattern from files) or external data (+
associated clock);
 PCM encoding;
 Frame encoding (CADU size) at two levels: External framing, internal framing. This enables
transport layering;
 Randomization;
 Error code encoding (exclusive functions):
RS DVB transport layer,
CCSDS RS,
LDPC;
 Convolutional encoding;
 Carrier generation & modulation (programmable Bit rate and IF frequency):
BPSK, QPSK, OQPSK, UQPSK, (TCM) 8PSK, 16QAM, 16APSK, 32 APSK, 64 APSK;
 Baseband pulse shape filtering (RRC, GMSK);
 Modulated signal output with programmable power level, up to two IF inputs;
 Noise generation with programmable power level and perfect C/N generation;
 Doppler simulation;
 Cross polarization interference simulation;
 DVB-S2(-X) and SCCC(-X) modulation sequences simulation.
Demodulator Board 1.4.3.3
Main features of the Demodulator board are:
 Amplification, filtering and analog-to-digital conversion of the IF signal;
 Digital vector demodulation;
 Bit synchronization;
 Decoding: Viterbi/TCM/LDPC/….;
 PCM decoding;
 Frame synchronization;
 Time tagging;
 De-randomization, RS or LDPC decoding;
 Data and Clock output;
 BER measurement;
 Vector analysis.
The Demodulator board is monitored and controlled by the Server CPU board via the PCI-express bus.
I/O Connectors 1.4.3.4
SMA-type I/O connectors are located at the rear panel of the chassis (Demodulator I/Os and Test
Modulator I/Os). The HDR can be delivered with LVDS outputs (option) or other.
See Section 2 for a detailed description of the I/O ports.