Safran CORTEX Series - Demodulator Inputs Description; Table 7: Single Channel Demodulator Input Modes; Table 8: Dual Channel Demodulator Input Mode

HIGH DATA RATE RECEIVER
HDR-4G+ USER’S MANUAL
Ref. DTU 100782
Is.Rev 3.5
Date: June 1, 2021
© Safran Data Systems – IMP000074 e14r1
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It cannot be duplicated or distributed without expressed written consent.
Page 71
Demodulator inputs description 2.2.2.2.3
Inputs into the frame synchronizer are available on SMA connectors in ECL electrical format or on
RJ45 connector in LVDS electrical format.
The following tables show the different configurations for both single and dual channel input.
INPUT MODE
DATA SERIAL
DATA // 2
CLK IN+
CLK IN-
J18 / J19
Clock
Clock
IN1+
IN1-
J20 / J21
Data
Data I
IN2+
IN2-
J22 / J23
Reserved
Data Q
IN3+
IN3-
J24 / J25
Reserved
Reserved
Table 7: Single channel demodulator input modes
INPUT MODE
DATA SERIAL
CLK IN+
CLK IN-
J18 / J19
Clock DPU 1
IN1+
IN1-
J20 / J21
Data DPU 1
IN2+
IN2-
J22 / J23
Data DPU 2
IN3+
IN3-
J24 / J25
Clock DPU 2
Table 8: Dual channel demodulator input mode