Safran CORTEX Series - Output Data Definition and Timing; Timing for All Output Types

HIGH DATA RATE RECEIVER
HDR-4G+ USER’S MANUAL
Ref. DTU 100782
Is.Rev 3.5
Date: June 1, 2021
© Safran Data Systems – IMP000074 e14r1
This document is the property of Safran Data Systems.
It cannot be duplicated or distributed without expressed written consent.
Page 73
Output Data Definition and Timing 2.2.3
Timing for all output types 2.2.3.1
Remark: For data output after specific decoding process (example: TCM + RS-DVB, punctured
Viterbi), “holes” inside the output data and clock signals can be present. These “holes” are due to the
delayed check symbols and / or synchronization words. Nevertheless it has to be considered that for
each data corresponds an edge of the clock.
* Clock polarity: Normal Output Clock
** Except when OUT3 = CLK
CLK+ *
OUTx +/- **
1 / Bit Rate
DATA
t
s
t
h
For I/Q merged output, RS CADU output and LDPC CADU output:
t
s
= 1/2BR - 500 ps
t
h
= 1/2BR - 500 ps
For normal I and Q outputs:
t
s
= 1/BR - 500 ps
t
h
= 1/BR - 500 ps