HIGH DATA RATE RECEIVER
HDR-4G+ USER’S MANUAL
Ref. DTU 100782
Is.Rev 3.5
Date: June 1, 2021
© Safran Data Systems – IMP000074 e14r1
This document is the property of Safran Data Systems.
It cannot be duplicated or distributed without expressed written consent.
The setting of the demodulator for the QPSK 4 DPU mode is the following:
The setting of the demodulator for the QPSK 2 DPU mode is the following:
Remark 1: The ambiguity resolution for multi DPU works only if all of the concerned channels are valid
(e.g. the 2, 4 or 8 Frame sync are locked), if one of these channels becomes and stays unlocked during
equivalent time of 15 frames, the ambiguity resolution state machine will consider itself in a bad
ambiguity resolution state and then will search for a new one. As a result, if one of the channels does
not work broken for any reason, it will impact all the channels.
Remark 2: The mode “8DPU Ambig” does work only for 16 QAM’s mapping: map 2.
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