Xilinx Zynq-7000 User Manual

Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1 673
UG586 November 30, 2016
www.xilinx.com
Appendix A: General Memory Routing Guidelines
10. Use chevron-style routing to allow for ground stitch vias (Figure A-5).
11. Add ground vias as much as possible around the edges of the device and inside the
device to make a better ground return path for signals and power, especially corners.
Corner or edge balls are generally less populated as grounds.
X-Ref Target - Figure A-5
Figure A-5: Example of Ground Stitching
UG583_c2_16_050614
Send Feedback

Xilinx Zynq-7000 Specifications

General

Series	Zynq-7000
Number of Cores	Dual-core
Processor Speed	Up to 1 GHz
Device Type	SoC
Logic Cells	Up to 350K
DSP Slices	Up to 900
External Memory Interfaces	DDR3, DDR2, LPDDR2
I/O Standards	LVCMOS, HSTL, SSTL
Operating Temperature	-40°C to +100°C (Industrial), 0°C to +85°C (Commercial)
Package Options	Various BGA packages
I/O Voltage	3.3V