Instrument Function
R&S
®
SMU200A
176Operating Manual 1007.9845.32 ─ 15
5.4.2 PRBS data
To be able to detect faulty bits by a BER measurement, the data generation polynomial
must be known. PRBS sequences are therefore used as the method for computing the
data (see chapter 5.8.2.1, "Internal PRBS Data and Data Patterns", on page 328). These
quasi-random bit sequences are repeated periodically, depending on the polynomial
selected. A randomly selected initial status yields exactly one subsequent status. The
initial status and therefore the subsequent status occur only once in the whole sequence.
Hence an advantage of the PRBS data is that the bit error detector must know only the
polynomial but not the entire sequence. At the start of a measurement, the feedback shift
register is filled once with the applied data sequence (which corresponds to the synchro-
nization time) and is subsequently switched from "fill" to "feedback". This creates a
defined initial status and generates exactly the same data that the applied data stream
should have. Faulty bits can thus be identified and counted by comparing the received
data with the results obtained from the shift register.
Creating a defined initial status makes it possible to start the analysis anywhere in the bit
stream, i.e. the bit-stream source and the analyzer need not be synchronized. Delays of
the DUT and transmission over long air paths, where the transmitter and the receiver are
located at separate sites, therefore do not present a problem.
5.4.3 CRC polynomial
In the block error rate measurement, the checksum (CRC) that contains the data signal
fed to the DUT is compared with the checksum that the block error rate tester calculates
from the feedback data. If the two checksums differ, a block error is counted. The quotient
obtained by dividing the number of faulty blocks by the total number of blocks is the block
error rate.
At the beginning of the data, the shift register is initialized with 0. All user data bits are
then shifted through the shift register. The CRC component is then read into a second
register and compared bit by bit with the result of the calculation.
CCITT CRC 16 : G(x) = x
16
+ x
12
+ x
5
+ x
1
is the CRC polynomial supported.
The user data is marked by a signal that comes from the DUT and is fed to the "Data
Enable" input of the BERT interface.
5.4.4 Clock signal
Usually the clock signal is provided by the DUT. If not, the bit clock can be extracted from
the CLOCK output connector (only with "Custom Dig Mod" signals in realtime). If signals
complying with other digital standards are generated or if ARB waveforms are used, a
marker signal can be used as a clock. As the DUT causes a delay, the ratio of clock-to-
data travel times must always be taken into account and checked with an oscilloscope if
necessary. The R&S Signal Generator indicates the status of the clock and data lines
and of the synchronization in the menus.
Bit and Block Error Rate Measurements - BERT Block
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