Safran CORTEX Series - Page 291

HIGH DATA RATE RECEIVER
HDR-4G+ USER’S MANUAL
Ref. DTU 100782
Is.Rev 3.5
Date: June 1, 2021
© Safran Data Systems – IMP000074 e14r1
This document is the property of Safran Data Systems.
It cannot be duplicated or distributed without expressed written consent.
Page 291
NRZM DPU
Click on the check box to enable or disable the function:
Enable
Disable
The received data in the DPU are decoded from NRZ-M to
NRZ-L before being sent to the frame synchronizer
No PCM decoding is performed
AUTO AMBIG.
Click on the check box to enable or disable the ambiguity resolution operation
by the frame synchronizer:
Enable
Disable
Automatic Ambiguity Resolution ON.
Automatic Ambiguity Resolution OFF.
LSB FIRST
Enable The frame synchronizer works with LSB first byte format
Disable The frame synchronizer works with MSB first byte format
SYNC. WORD
Synchronization Word. Enter any 64-bit hexadecimal value (left field = 32 MS
bits, right field = 32 LS bits). MSB-aligned value. Example: If the
Synchronization Word is 1ACFFC1D
H
, enter 1ACFFC1D00000000
H
).
SW MASK
Synchronization Word mask. Enter any 128-bit hexadecimal value. MSB-
aligned value. « 1 » bits in the mask indicate which bits in the Synchronization
Word must be ignored by the frame synchronizer. Enter 0 for no mask.
Example: for a 32-bit Synchronization word, enter 00000000XXXXXXXX
H
(no
masked bits).
SYNC. WORD SIZE
Synchronization Word size, in bits. Must be an integer number of bytes. Enter
8, 16, 24, 32, 40, 48, 56, 64, … or 128.
Example: if the Synchronization Word is 1ACFFC1D
H
, enter 32.
For an non integer number of bytes specification, use the upper integer number
of bytes value and use the mask to meet specification.
FRAME/BLOCK SIZE
Telemetry frame length, in bytes. Enter any integer from 16 to 1048580.
Includes the Synchronization Word.
SYNCHRONIZATION
STRATEGY
Frame synchronizer strategy:
SYN
CTL
LTS
Slip
Number of errors tolerated in the Synchronization Word. Enter any
integer from 0 to 15.
Check-to-Lock threshold. Number of consecutive occurrences of
correct Synchronization Words before going from the CHECK phase to
the LOCK phase. Enter any integer from 0 to15.
Lock-to-Search threshold. Number of consecutive occurrences of
incorrect Synchronization Words before going from the LOCK phase
to the SEARCH phase. Enter any integer from 0 to 15.
Number of bit slip tolerated for the search of the synchronization word
in LOCK phase. Enter 0, 1 or 2.