3.20.6.8 Technical revision history
Table 230: TONGAPC Technical revision history
Product connectivity
level
Technical revision Change
PCL2 D Changed the
On delay time
step to 1 ms
3.20.7 SR flip-flop, eight channels, nonvolatile SRGAPC (ANSI SR)
3.20.7.1 Identification
Function description IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
SR flip-flop, eight channels, nonvo-
latile
SRGAPC SR SR
3.20.7.2 Function block
Figure 139: Function block
3.20.7.3 Functionality
The SR flip-flop, eight channels, nonvolatile function SRGAPC is a simple SR flip-flop
with a memory that can be set or that can reset an output from the S# or R# inputs,
respectively. The function contains eight independent set-reset flip-flop latches
where the SET input has the higher priority over the RESET input. The status of
each Q# output is retained in the nonvolatile memory. The individual reset for each
Q# output is available on the LHMI or through tool via communication.
1MRS759142 F
Basic functions
REX640
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