ABB RELION REX640 - Page 659

Vector group of
the transformer
Winding 1 type Winding 2 type Phase shift Zero sequence
current
elimination
ZNd4 ZN d 4 (Automatic)
Zd6 Z d 6 Not needed
ZNd6 ZN d 6 HV side
Zd8 Z d 8 Not needed
ZNd8 ZN d 8 (Automatic)
Zd10 Z d 10 Not needed
ZNd10 ZN d 10 (Automatic)
Zz0 Z z 0 Not needed
ZNz0 ZN z 0 HV side
ZNzn0 ZN zn 0 HV & LV side
Zzn0 Z zn 0 LV side
Zz2 Z z 2 Not needed
ZNz2 ZN z 2 (Automatic)
ZNzn2 ZN zn 2 (Automatic)
Zzn2 Z zn 2 (Automatic)
Zz4 Z z 4 Not needed
ZNz4 ZN z 4 (Automatic)
ZNzn4 ZN zn 4 (Automatic)
Zzn4 Z zn 4 (Automatic)
Zz6 Z z 6 Not needed
ZNz6 ZN z 6 HV side
ZNzn6 ZN zn 6 HV & LV side
Zzn6 Z zn 6 LV side
Zz8 Z z 8 Not needed
ZNz8 ZN z 8 (Automatic)
ZNzn8 ZN zn 8 (Automatic)
Zzn8 Z zn 8 (Automatic)
Zz10 Z z 10 Not needed
ZNz10 ZN z 10 (Automatic)
ZNzn10 ZN zn 10 (Automatic)
Zzn10 Z zn 10 (Automatic)
Zero-sequence component elimination
If Clock number is “Clk Num 2“, “Clk Num 4”, “Clk Num 8” or “Clk Num 10”, the vector
group matching is always done on both, winding 1 and winding 2. The combination
results in the correct compensation. In this case the zero-sequence component is
always removed from both sides automatically. The Zro A elimination parameter
cannot change this.
1MRS759142 F
Protection functions
REX640
Technical Manual
659