Intel Arria 10 User Manual

2.6.6.9.1. SDR XGMII TX Interface
Table 171. SDR TX XGMII Interface
Signal Name Direction Description
xgmii_tx_dc[71:0]
Input Contains 4 lanes of data and control for XGMII. Each lane consists of
16 bits of data and 2 bits of control. Synchronous to mgmt_clk.
• Lane 0–[7:0]/[8], [43:36]/[44]
• Lane 1–[16:9]/[17], [52:45]/[53]
• Lane 2–[25:18]/[26], [61:54]/[62]
• Lane 3–[34:27]/[35],[70:63]/[71]
xgmii_tx_clk
Input The XGMII SDR TX clock which runs at 156.25 MHz.
2.6.6.9.2. SDR XGMII RX Interface
Table 172. SDR RX XGMII Interface
Signal Name Direction Description
xgmii_rx_dc_[71:0]
Output Contains 4 lanes of data and control for XGMII. Each lane consists of
16 bits of data and 2 bits of control. Synchronous to mgmt_clk.
• Lane 0–[7:0]/[8], [43:36]/[44]
• Lane 1–[16:9]/[17], [52:45]/[53]
• Lane 2–[25:18]/[26], [61:54]/[62]
• Lane 3–[34:27]/[35],[70:63]/[71]
xgmii_rx_clk
Output The XGMII SDR RX clock which runs at 156.25 MHz.
xgmii_rx_inclk
Input The XGMII SDR RX input clock which runs at 156.25 MHz. This port
is only available when Enable phase compensation FIFO is
selected.
2.6.6.9.3. Transceiver Serial Data Interface
The XAUI transceiver serial data interface has four lanes of serial data for both the TX
and RX interfaces. This interface runs at 3.125 Gbps. There is no separate clock signal
because it is encoded in the data.
Table 173. Serial Data Interface
Signal Name Direction Description
xaui_rx_serial_data[3:0]
Input Serial input data.
xaui_tx_serial_data[3:0]
Output Serial output data.
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
224

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex