Intel Arria 10 User Manual

Table 29. KR-FEC Parameters
Parameter Range Description
Enable RX KR-FEC
error marking
On/Off When you turn on this option, the decoder asserts both sync bits
(2'b11) when it detects an uncorrectable error. This feature
increases the latency through the KR-FEC decoder.
Error marking type 10G, 40G Specifies the error marking type (10G or 40G).
Enable KR-FEC TX
error insertion
On/Off Enables the error insertion feature of the KR-FEC encoder. This
feature allows you to insert errors by corrupting data starting a bit
0 of the current word.
KR-FEC TX error
insertion spacing
User Input (1 bit to 15
bit)
Specifies the spacing of the KR-FEC TX error insertion.
Enable tx_enh_frame
port
On/Off Enables the tx_enh_frame port.
Enable rx_enh_frame
port
On/Off Enables the rx_enh_frame port.
Enable
rx_enh_frame_diag_st
atus port
On/Off Enables the rx_enh_frame_diag_status port.
Related Information
• Arria 10 Enhanced PCS Architecture on page 461
• Using the "Basic (Enhanced PCS)" and "Basic with KR FEC" Configurations of
Enhanced PCS on page 289
• Interlaken on page 94
• 10GBASE-KR PHY IP Core on page 135
• Enhanced PCS Ports on page 76
• 10GBASE-R, 10GBASE-R with IEEE 1588v2, and 10GBASE-R with FEC Variants on
page 124
2.4.5. Standard PCS Parameters
This section provides descriptions of the parameters that you can specify to customize
the Standard PCS.
For specific information about configuring the Standard PCS for these protocols, refer
to the sections of this user guide that describe support for these protocols.
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
62

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex