Intel Arria 10 User Manual

Attribute Default value in PCIe
mode
Value to be set to use TTK/
System Console
Description
adp_ctle_acg
ain_4s
0x167[5:1]
5’b0 Depends on the value set by
adp_ctle_acgain_4s Register setting
Set CTLE manual 4S AC gain
• Direct mapped
Adp_status_s
el
0x14C[5:0]
Set the mux to 6’b011011 Set the mux to 6’b011011 Sets the test mux to read the CTLE
converged values from 0x177[3:0]
Test_mux
0x177[3:0]
Read values. Map 4 bit
value read out to 5 bit
gain values
Read values. Map 4 bit value read
out to 5 bit gain values
Reflects the converged values from
CTLE adaptation
Note:
You must set the attribute rrx_pcie_eqz located at register address 0x161[2] back
to 1’b1 to allow the Arria 10 PCIe PIPE design to listen to the port
pipe_g3_rxpresethint[2:0] on each channel for normal PCIe operation.
Related Information
• Analog Parameter Settings on page 585
• Debugging Transceiver Links with Transceiver Toolkit
• Arria 10 Register Map
2.8. CPRI
The common public radio interface (CPRI) is a high-speed serial interface developed
for wireless network radio equipment controller (REC) to uplink and downlink data
from available remote radio equipment (RE).
The CPRI protocol defines the interface of radio base stations between the REC and
the RE. The physical layer supports both the electrical interfaces (for example,
traditional radio base stations) and the optical interface (for example, radio base
stations with a remote radio head). The scope of the CPRI specification is restricted to
the link interface only, which is a point-to-point interface. The link has all the features
necessary to enable a simple and robust usage of any given REC and RE network
topology, including a direct interconnection of multiport REs.
2. Implementing Protocols in Arria 10 Transceivers
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
279

Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex