Intel Arria 10 User Manual

Figure 269. Writing to the Reconfiguration Interface
reconfig_address
reconfig_write
reconfig_waitrequest
reconfig_read
reconfig_readdata
2
1
reconfig_writedata
reconfig_clk
1. The master asserts the reconfig_address, reconfig_write, and reconfig_writedata signals.
2. The slave (channel or PLL) captures reconfig_writedata, ending the transfer.
119h
0000000c
Note: You must check for the internal configuration bus arbitration before performing
reconfiguration. Refer to the Arbitration section for more details about requesting
access to and returning control of the internal configuration bus from PreSICE.
Related Information
• Arbitration on page 512
• Ports and Parameters on page 535
6.3. Configuration Files
The Arria 10 Transceiver Native PHY and Transmit PLL IP cores optionally allow you to
save the parameters you specify for the IP instances as configuration files. The
configuration file stores addresses and data values for that specific IP instance.
The configuration files are generated during IP generation. They are located in the <IP
instance name>\altera_xcvr_<IP type>_a10_<quartus version>\synth
\reconfig subfolder of the IP instance. The configuration data is available in the
following formats:
• SystemVerilog packages: <name>.sv
• C Header files: <name>.h
• Memory Initialization File (MIF): <name>.mif
Select one or more of the configuration file formats on the Dynamic
Reconfiguration tab of the Transceiver Native PHY or Transmit PLL parameter editor
to store the configuration data. All configuration files generated for a particular IP
instance contain the same address and data values. The contents of the configuration
files can be used to reconfigure from one transceiver /PLL configuration to another.
6. Reconfiguration Interface and Dynamic Reconfiguration
UG-01143 | 2018.06.15
Intel
®
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10 Transceiver PHY User Guide
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Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex