Intel Arria 10 User Manual

Analog Parameter Setting Pin Planner or Assignment Editor
Name
Assignment
Destination
Usage Guideline
XCVR_A10_TX_PRE_EMP_SWITCHI
NG_CTRL_1ST_POST_TAP
Transmitter Pre-Emphasis First
Post-Tap Magnitude
TX serial data Pre-emphasis
XCVR_A10_TX_PRE_EMP_SWITCHI
NG_CTRL_2ND_POST_TAP
Transmitter Pre-Emphasis Second
Post-Tap Magnitude
TX serial data Pre-emphasis
XCVR_A10_TX_VOD_OUTPUT_SWI
NG_CTRL
Transmitter Output Swing Level TX serial data Differential output voltage
Table 306. Reference Clock Analog Parameter Settings
Analog Parameter Setting Pin Planner or Assignment Editor
Name
Assignment
Destination
Usage Guideline
XCVR_A10_REFCLK_TERM_TRISTAT
E
Dedicated Reference Clock Pin
Termination
Reference clock
pin
On-chip termination
Note: You must set all the required analog settings according to your protocol configuration.
If you do not set the appropriate settings, then the Quartus Prime software selects the
default values which may not be appropriate for your protocol implementation.
8.4. Receiver General Analog Settings
8.4.1. XCVR_A10_RX_LINK
Pin planner or Assignment Editor Name
Receiver Link Type
Description
This parameter is configured depending on the link characteristic. Value SR is used for
link insertion loss less than equal to 10dB and value LR is used for link insertion loss
greater than 10dB. If this QSF assignment is not done, Quartus Prime assigns SR as
the default value. Settings dependent on this parameter value are DC gain, VGA and
sd_threshold for SATA. This is also used for data rate legality check during
compilation.
For SR: sd_threshold for SATA = SDLV_4
For LR: sd_threshold for SATA = SDLV_6
For the default values of DC gain and VGA corresponding to RX_LINK setting, look for
QSF assignments XCVR_A10_RX_EQ_DC_GAIN_TRIM and
XCVR_A10_RX_ADP_VGA_SEL.
Table 307. Available Options
Value Description
SR (Short Reach) Less than or equal to10dB IL, used for Chip-to-chip communication
LR (Long Reach) >10dB IL, used for Backplane communication
8. Analog Parameter Settings
UG-01143 | 2018.06.15
Intel
®
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10 Transceiver PHY User Guide
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Intel Arria 10 Specifications

General

Transceiver Data Rate	Up to 17.4 Gbps
Transceiver Protocols Supported	CPRI, JESD204B
Transceiver Power Consumption	Varies depending on configuration and data rate. Refer to Intel Arria 10 device power estimation tools.
Transceiver Features	Clock data recovery
Power Consumption per Channel	Varies depending on data rate and equalization settings. Refer to Intel Arria 10 device power estimation tools.
Transceiver Type	FPGA integrated transceiver
Operating Temperature Range	-40°C to 100°C (Industrial)
Number of Transceiver Channels	up to 96 full-duplex