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Intel Arria 10 User Manual

Intel Arria 10
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For RX_LINK = LR and CTLE mode = S1_MODE and datarate > 4.5Gbps: default value
is RADP_VGA_SEL_4.
For RX_LINK = LR and CTLE mode = S1_MODE and datarate > 4.5Gbps and data rate
≤ 17.4Gbps,: default value is RADP_VGA_SEL_4.
For RX_LINK = SR and CTLE mode = NON_S1_MODE and datarate <= 4.5Gbps:
default value is RADP_VGA_SEL_4.
For RX_LINK = SR and CTLE mode = NON_S1_MODE and datarate > 4.5Gbps: default
value is RADP_VGA_SEL_4.
For RX_LINK = SR and CTLE mode = S1_MODE: default value is RADP_VGA_SEL_4.
Table 313. Available Options
Value Description
RADP_VGA_SEL_<0 to 7> VGA Output Voltage Swing Setting <0 to 7>
Assign To
RX serial data pin.
Syntax
set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL <value> -to
<rx_serial_data pin name>
8.5.3. Decision Feedback Equalizer (DFE) Settings
The decision feedback equalizer (DFE) amplifies the high frequency component of a
signal without amplifying the noise content. The DFE removes the post-cursor Inter
Symbol Interference (ISI) of the bits received previously from the current bit and
improves the Bit Error Rate (BER). The DFE architecture supports eleven fixed taps.
The fixed taps in DFE remove the ISI of the previous 11 bits from the current bit.
The DFE circuit stores delayed versions of the data. The stored bit is multiplied by a
coefficient and then summed with the incoming signal. The polarity of each coefficient
is programmable.
Note: The DFE fixed tap assignments are described in the following section.
8.5.3.1. XCVR_A10_RX_ADP_DFE_FXTAP
Description
The following assignments specify the coefficient of DFE fixed taps 1 through 11.
These assignments are applicable only when the DFE is enabled and adaptation is
disabled for the DFE (DFE operates in manual mode). The default value for all
assignments is set to RADP_DFE_FXTAP<1 to 11>_0 for DFE fixed tap<1 to 11>
coefficient setting 0. DFE tap1 in the only tap which is always positive and hence there
is no QSF assignment for DFE tap1 sign bit. Other taps can be positive or negative.
8. Analog Parameter Settings
UG-01143 | 2018.06.15
Intel
®
Arria
®
10 Transceiver PHY User Guide
594

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Intel Arria 10 Specifications

General IconGeneral
BrandIntel
ModelArria 10
CategoryTransceiver
LanguageEnglish

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